Zilog Z80 - Brief History and Overview

Brief History and Overview

The Z80 came about when Federico Faggin, after working on the 8080, left Intel at the end of 1974 to found Zilog with Ralph Ungermann, and by July 1976 they had the Z80 on the market. It was designed to be binary compatible with the Intel 8080 so that most 8080 code, notably the CP/M operating system, would run unmodified on it. Masatoshi Shima, co-designer of the 4004 and the 8080, also contributed to the development of the Z80.

The Z80 offered many real improvements over the 8080:

• An enhanced instruction set including bit manipulation, block move, block I/O, and byte search instructions
• New IX and IY index registers with instructions for direct base+offset addressing
• A better interrupt system
  • A more automatic and general vectorized interrupt system, mode 2, as well as a fixed vector interrupt system, mode 1, for simple systems with minimal hardware (mode 0 being the 8080-compatible mode).
  • A non maskable interrupt (NMI) which can be used to respond to power down situations and/or other high priority events (and allowing a minimalistic Z80 system to easily implement a two-level interrupt scheme in mode 1).
  • Two separate register files, which could be quickly switched, to speed up response to interrupts
• Less hardware required for power supply, clock generation and interface to memory and I/O
  • Single 5 Volt power supply (the 8080 needed -5V/+5V/+12V)
  • Single-phase 5 V clock (the 8080 needed a two-phase high-amplitude clock generator)
  • A built-in DRAM refresh mechanism that would otherwise have to be provided by external circuitry
  • Non-multiplexed buses (the 8080 had state-signals multiplexed onto the data bus)

The Z80 took over from the 8080 and its offspring, the 8085, in the processor market, and became one of the most popular 8-bit CPUs. Perhaps a key to the initial success of the Z80 was the built-in DRAM refresh, and other features which allowed systems to be built with fewer support chips (later on, most Z80 systems have been embedded systems, which typically uses static RAM and hence does not need this refresh).

For the original NMOS design, the specified upper clock frequency limit increased successively from the introductory 2.5 MHz, via the well known 4 MHz (Z80A), up to 6 (Z80B) and 8 MHz (Z80H). A CMOS version was also developed with specified frequency limits ranging from 4 MHz up to 20 MHz for the version sold today. The CMOS version also allowed a low-power sleep with internal state retained (having no lower frequency limit). The fully compatible derivatives HD64180/Z180 and eZ80 are currently specified for up to 33 and 50 MHz respectively.