Depletion Region - Formation of Depletion Region in An MOS Capacitor

Formation of Depletion Region in An MOS Capacitor

Another example of a depletion region occurs in the MOS capacitor. It is shown in the figure to the right, for a P-type substrate. Suppose that the semiconductor initially is charge neutral, with the charge due to holes exactly balanced by the negative charge due to acceptor doping impurities. If a positive voltage now is applied to the gate, which is done by introducing positive charge Q to the gate, then some positively charged holes in the semiconductor nearest the gate are repelled by the positive charge on the gate, and exit the device through the bottom contact. They leave behind a depleted region that is insulating because no mobile holes remain; only the immobile, negatively charged acceptor impurities. The greater the positive charge placed on the gate, the more positive the applied gate voltage, and the more holes that leave the semiconductor surface, enlarging the depletion region. (In this device there is a limit to how wide the depletion width may become. It is set by the onset of an inversion layer of carriers in a thin layer, or channel, near the surface. The above discussion applies for positive voltages low enough that an inversion layer does not form.)

If the gate material is polysilicon of opposite type to the bulk semiconductor, then a spontaneous depletion region forms if the gate is electrically shorted to the substrate, in much the same manner as described for the pn-junction above.