Computer Architecture - Subcategories

Subcategories

The art of computer architecture has three main subcategories:

• Instruction set architecture, or ISA. The ISA is the code that a central processor reads and acts upon. It is the machine language (or assembly language), including the instruction set, word size, memory address modes, processor registers, and address and data formats.

• Microarchitecture, also known as Computer organization describes the data paths, data processing elements and data storage elements, and describes how they should implement the ISA. The size of a computer's CPU cache for instance, is an organizational issue that generally has nothing to do with the ISA.

• System Design includes all of the other hardware components within a computing system. These include:

1. Data paths, such as computer buses and switches
2. Memory controllers and hierarchies
3. Data processing other than the CPU, such as direct memory access (DMA)
4. Miscellaneous issues such as virtualization or multiprocessing.

Some practitioners of computer architecture at companies such as Intel and AMD use more fine distinctions:

• Macroarchitecture — architectural layers that are more abstract than microarchitecture, e.g. ISA
• Instruction Set Architecture (ISA) — as defined above minus
• Assembly ISA — a smart assembler may convert an abstract assembly language common to a group of machines into slightly different machine language for different implementations
• Programmer Visible Macroarchitecture — higher level language tools such as compilers may define a consistent interface or contract to programmers using them, abstracting differences between underlying ISA, UISA, and microarchitectures. E.g. the C, C++, or Java standards define different Programmer Visible Macroarchitecture — although in practice the C microarchitecture for a particular computer includes
• UISA (Microcode Instruction Set Architecture)—a family of machines with different hardware level microarchitectures may share a common microcode architecture, and hence a UISA.
• Pin Architecture—the set of functions that a microprocessor is expected to provide, from the point of view of a hardware platform, e.g., the x86 A20M, FERR/IGNNE or FLUSH pins, and the messages that the processor is expected to emit after completing a cache invalidation so that external caches can be invalidated. Pin architecture functions are more flexible than ISA functions—external hardware can adapt to changing encodings, or changing from a pin to a message—but the functions must be provided in successive implementations even if the manner of encoding them changes.