In computer architecture, 64-bit computing is the use of processors that have datapath widths, integer size, and memory addresses of 64 bits (8 octets) wide. Also, 64-bit CPU and ALU architectures are those that are based on registers, address buses, or data buses of that size. From the software perspective, 64-bit computing means the use of code with 64-bit virtual memory addresses.
64-bit is a descriptor given to a generation of computers in which 64-bit processors are the norm. 64 bits is a word size that defines certain classes of computer architecture, buses, memory and CPUs, and by extension the software that runs on them. 64-bit CPUs have existed in supercomputers since the 1970s (Cray-1, 1975) and in RISC-based workstations and servers since the early 1990s. In 2003 they were introduced to the (previously 32-bit) mainstream personal computer arena in the form of the x86-64 and 64-bit PowerPC processor architectures.
A 64-bit register can store 264 (over 18 quintillion) different values. Hence, a processor with 64-bit memory addresses can directly access 264 bytes(=16 exbibytes) of byte-addressable memory.
Without further qualification, a 64-bit computer architecture generally has integer and addressing registers that are 64 bits wide, allowing direct support for 64-bit data types and addresses. However, a CPU might have external data buses or address buses with different sizes from the registers, even larger (the 32-bit Pentium had a 64-bit data bus, for instance). The term may also refer to the size of low-level data types, such as 64-bit floating-point numbers.
Read more about 64-bit Computing: Architectural Implications, History, Limitations of Practical Processors, 64-bit Processor Timeline, 64-bit Operating System Timeline, 64-bit Data Models, Current 64-bit Microprocessor Architectures