Parallel-in, Serial-out (PISO)
This configuration has the data input on lines D1 through D4 in parallel format. To write the data to the register, the Write/Shift control line must be held LOW. To shift the data, the W/S control line is brought HIGH and the registers are clocked. The arrangement now acts as a SISO shift register, with D1 as the Data Input. However, as long as number of clock cycles is not more than the length of the data-string, the Data Output, Q, will be the parallel data read off in order.
The animation below shows the write/shift sequence, including the internal state of the shift register.
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