Glossary
There can be misunderstanding of the meaning of the terms, POWER, PowerPC and Power Architecture. The following glossary gives brief descriptions of each term, along with links to articles with details.
| Term | Description |
|---|---|
| POWER | Performance Optimization With Enhanced RISC. A microprocessor architecture designed by IBM. |
| PowerPC | Power Performance Computing. A 32/64-bit instruction set for microprocessors derived from POWER, including some new elements. Designed by the AIM alliance; Apple, IBM and Motorola. |
| PowerPC-AS | PowerPC-Advanced Series. Codename "Amazon". A purely 64-bit variant of PowerPC, including some elements from the POWER2 specification. Used in IBM's RS64 family processors and newer POWER processors. |
| POWERn | Where n is a number from 1 to 7. A series of high-end microprocessors built by IBM using different combinations of POWER, PowerPC, PowerPC-AS and Power instruction sets.
Main articles: POWER processors, POWER1, POWER2, POWER3, POWER4, POWER5, POWER6 and POWER7 |
| Cell | Cell Broadband Engine Architecture (CBEA), a microprocessor architecture designed by IBM, Sony and Toshiba, which has Power Architecture as a part. |
| Power Architecture | The broad term designating all that is POWER, PowerPC and Cell including software, toolchain and end-user appliances. These are the focus of this article. |
| Power ISA | A new instruction set, combining late versions of POWER and PowerPC instruction sets. Designed by IBM and Freescale. |
Read more about this topic: Power Architecture
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