Plesiochronous Digital Hierarchy - Implementation

Implementation

The data rate is controlled by a clock in the equipment generating the data. The rate is allowed to vary by ±50 ppm of 2.048 Mbit/s. This means that different data streams can be (probably are) running at slightly different rates to one another.

In order to move multiple data streams from one place to another, they are multiplexed in groups of four. This is done by taking 1 bit from stream #1, followed by 1 bit from stream #2, then #3, then #4. The transmitting multiplexer also adds additional bits in order to allow the far end receiving multiplexer to decode which bits belong to which data stream, and so correctly reconstitute the original data streams. These additional bits are called "justification" or "stuffing" bits.

Because each of the four data streams is not necessarily running at the same rate, some compensation has to be introduced. The transmitting multiplexer combines the four data streams assuming that they are running at their maximum allowed rate. This means that occasionally, (unless the 2 Mbit/s really is running at the maximum rate) the multiplexer will look for the next bit but it will not have arrived. In this case, the multiplexer signals to the receiving multiplexer that a bit is "missing". This allows the receiving multiplexer to correctly reconstruct the original data for each of the four 2 Mbit/s data streams, and at the correct, different, plesiochronous rates.

The resulting data stream from the above process runs at 8.448 Mbit/s (about 8 Mbit/s). Similar techniques are used to combine four × 8 Mbit/s together, plus bit stuffing, giving 34 Mbit/s. Four × 34 Mbit/s, gives 140. Four × 140 gives 565.

565 Mbit/s is the rate typically used to transmit data over a fibre optic system for long distance transport. Recently, telecommunications companies have been replacing their PDH equipment with SDH equipment capable of much higher transmission rates.