Motorola 68000 Family - Architecture

Architecture

People who are familiar with the PDP-11 or VAX usually feel comfortable with the 68000. With the exception of the split of general purpose registers into specialized data and address registers, the 68000 architecture is in many ways a 32-bit PDP-11.

The instruction set was much more "orthogonal" than those of many processors that came before (e.g., 8080) and after (e.g., x86). That is, it was typically possible to combine operations freely with operands, rather than being restricted to using certain addressing modes with certain instructions. This property made programming relatively easy for humans, and also made it easier to write code generators for compilers.

The 68000 instruction set can be divided in the following broad categories:

• Load and store (Move.B, Move.W, Move.L)
• Arithmetic (Add, Sub, Mul, Div)
• Bit shifting (left or right, logical or arithmetical)
• Bit rotation (ROR, ROL, ROXL, ROXR)
• Logic operations (And, Or, Not, EOr)
• Type conversion (byte to word and vice versa)
• Conditional and unconditional branches (Bra, BCS, BEq, BNE, BHI, BLO, BMI, BPL, etc.)
• Subroutine invocation and return (BSR, RTS)
• Stack management (pea / move x,(sp) / move (sp),x )
• Causing and responding to interrupts
• Exception handling
• There is no equivalent to the x86 CPUID instruction to determine what CPU or MMU or FPU is present.