Motorola 6800 - MC6800 Microprocessor Design

MC6800 Microprocessor Design

The Motorola 6800 and the Intel 8080 were designed at the same time and were similar in function. The 8080 was a superset of the Intel 8008 which was based on the Datapoint 2200 processor. The 6800 architecture was modeled after the DEC PDP-11 processor. Both are TTL compatible, have an 8-bit bidirectional data bus, a 16-bit stack pointer, a 16-bit address bus that can address 64 KB of memory and come in a 40-pin DIP package. The 6800 has two accumulators and a 16-bit index register. The Direct Addressing mode allows fast access the first 256 bytes of memory. I/O devices are addressed as memory so there are no special I/O instructions. The 8080 has more internal registers and instructions for dedicated I/O ports. When the 8080 was reset, the program counter was cleared and the processor started at memory location 0000. The 6800 loaded the program counter from the highest address and started at the memory location stored there. The 6800 has a three-state control that will disable the address bus to allow another device direct memory access. A disk controller could transfer data into memory with no load on the processor. It is even possible to have two 6800 processors access the same memory. However, in practice systems of such complexity usually required the use of external bus transceivers to drive the system bus: in such circuits the on-processor bus control was disabled entirely in favour of using the similar capabilities of the bus tranceiver. The 6802 dispensed with this on-chip control entirely in order to free pins for other functions in the same 40-pin package as the 6800, but this functionality could still be achieved using an external bus transceiver.

MOS ICs typically used dual clock signals (a two-phase clock) in the 1970s. These were generated externally for both the 6800 and the 8080. The next generation of microprocessors incorporated the clock generation on chip. The 8080 had a 2 MHz clock but the processing throughput was similar to the 1 MHz 6800. The 8080 require more clock cycles to execute a processor instruction. The 6800 had a minimum clock rate of 100 kHz while the 8080 could be halted. Higher speed versions of both microprocessors were released by 1976.

Other divisions in Motorola developed components for the M6800 family. The Components Products Department designed the MC6870 two-phase clock IC; the Memory Products group provided a full line of ROMs and RAMs. The CMOS group's MC14411 Bit Rate Generator provided a 75 to 9600 baud clock for the MC6850 serial interface. The buffers for address and data buses were standard Motorola products. Motorola could supply every IC, transistor and diode necessary to build a MC6800 based computer.