Instruction Set
The MCS-51 instruction set offers several addressing modes, including
- direct register, using ACC (the accumulator) and R0-R7
- direct memory, which access the internal RAM or the SFR's, depending on the address
- indirect memory, using R0, R1, or DPTR to hold the memory address. The instruction used may vary to access internal RAM, external RAM, or program memory.
- individual bits of a range of IRAM and some of the SFR's
And some of the common instructions are-
- mov | e.g., mov a,#30h ; a = 30h
- add | e.g., add a,r3 ; a=a+r3
- subb | e.g., subb a,r3 ; a=a-r3
- clr bit | e.g., clr p1.1
- setb bit | e.g., setb p1.1
- inc R0;
- mul AB;
- div AB;
Many of the operations allow any addressing mode for the source or the destination, for example, MOV 020h, 03fh will copy the value in memory location 0x3f in the internal RAM to the memory location 0x20, also in internal RAM.
Because the 8051 is an accumulator-based architecture, all arithmetic operations must use the accumulator, e.g. ADD A, 020h will add the value in memory location 0x20 in the internal RAM to the accumulator.
One does not need to master these instructions to program the 8051. With the availability of good quality C compilers, including open source SDCC, virtually all programs can be written with high-level language.
Read more about this topic: Intel MCS-51
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