Architecture
The 80286 was designed for multi-user systems with multitasking applications, including communications (such as automated PBXs) and real-time process control. It had 134,000 transistors and consisted of four independent units: address unit, bus unit, instruction unit and execution unit, which formed a pipeline significantly increasing the performance. It was produced in a 68-pin package including PLCC (Plastic Leaded Chip Carrier), LCC (Leadless chip carrier) and PGA (Pin Grid Array) packages.
The performance of the 80286 per clock cycle exceeded that of the Intel 8086 and Intel 8088 by more than two times. This increase of the 80286's performance over its immediate predecessors may be the largest among the generations of x86 processors. Calculations of the addresses (such as base+index) were less expensive because they were performed by a special unit in the 286. The 8086 had to do effective address computation using its general ALU, which led to a significant clock penalty. Also, the 80286 was more efficient in complex mathematical operations (such as MUL/DIV) than its predecessor.
The intel 80286 had a 24-bit address bus and was able to address up to 16 MB of RAM, compared to 1 MB for its predecessor. However cost and initial rarity of software using the memory above 1 MB meant that 80286 computers were rarely shipped with more than one megabyte of RAM. Additionally, there was a performance penalty involved in accessing extended memory from real mode, as noted below.
Read more about this topic: Intel 80286
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