IBM System/370 - Expanding The Address Space

Expanding The Address Space

As described above, the S/370 product line underwent a major architectural change: expansion of its address space from 24 to 31 bits.

The evolution of S/370 addressing was always complicated by the basic S/360 instruction set design, and its large installed code base, which relied on a 24-bit logical address. (In particular, a heavily-used machine instruction, "Load Address" (LA), explicitly cleared the top eight bits of the address being placed in a register. This created enormous migration problems for existing software.)

The strategy chosen was to implement expanded addressing in three stages:

1. First at the physical level (to enable more memory hardware per system)
2. Then at the operating system level (to let system software access multiple address spaces and utilize larger address spaces)
3. Finally at the application level (to let new applications access larger address spaces)

Since the core S/360 instruction set remained geared to a 24-bit universe, this third step would require a real break from the status quo; existing assembly language applications would of course not benefit, and new compilers would be needed before non-assembler applications could be migrated. Most shops thus continued to run their 24-bit applications in a higher-performance 31-bit world.

This evolutionary implementation (repeated in z/Architecture) had the characteristic of solving the most urgent problems first: relief for real memory addressing being needed sooner that virtual memory addressing.