Convolutional Code - Convolutional Encoding

Convolutional Encoding

To convolutionally encode data, start with k memory registers, each holding 1 input bit. Unless otherwise specified, all memory registers start with a value of 0. The encoder has n modulo-2 adders (a modulo 2 adder can be implemented with a single Boolean XOR gate, where the logic is: 0+0 = 0, 0+1 = 1, 1+0 = 1, 1+1 = 0), and n generator polynomials — one for each adder (see figure below). An input bit m₁ is fed into the leftmost register. Using the generator polynomials and the existing values in the remaining registers, the encoder outputs n bits. Now bit shift all register values to the right (m₁ moves to m₀, m₀ moves to m_-1) and wait for the next input bit. If there are no remaining input bits, the encoder continues output until all registers have returned to the zero state.

The figure below is a rate 1/3 (m/n) encoder with constraint length (k) of 3. Generator polynomials are G₁ = (1,1,1), G₂ = (0,1,1), and G₃ = (1,0,1). Therefore, output bits are calculated (modulo 2) as follows:

n₁ = m₁ + m₀ + m_-1

n₂ = m₀ + m_-1

n₃ = m₁ + m_-1.