Technical Detail
In order to increase memory bandwidth, the Chip RAM data bus was extended to 32-bit width (as in the A3000) and the Alice chip (replacing OCS/ECS Agnus) was improved to be able to support full width access for bitplane DMA. Additionally, the memory clock was doubled.
Lisa (replacing former Denise) added support for 8-bit bitplane data fetches, 256 instances of 24-bit palette registers, and for 32-bit data transfer for bitplane graphic and sprites.
The rest of the chipset remained unchanged, as did the Blitter and Copper coprocessors in Alice, still working on 16-bit data.
Read more about this topic: Amiga Advanced Graphics Architecture
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