Example: Fujitsu 65 Nm Process
- Gate length: 30 nm (high-performance) to 50 nm (low-power)
- Core voltage: 1.0 V
- 11 Cu interconnect layers using nano-clustering silica as ultralow k dielectric (k=2.25)
- Metal 1 pitch: 180 nm
- Nickel silicide source/drain
- Gate oxide thickness: 1.9 nm (n), 2.1 nm (p)
There are actually two versions of the process: CS200, focusing on high performance, and CS200A, focusing on low power.
Read more about this topic: 65 Nanometer
Famous quotes containing the word process:
“Rules and particular inferences alike are justified by being brought into agreement with each other. A rule is amended if it yields an inference we are unwilling to accept; an inference is rejected if it violates a rule we are unwilling to amend. The process of justification is the delicate one of making mutual adjustments between rules and accepted inferences; and in the agreement achieved lies the only justification needed for either.”
—Nelson Goodman (b. 1906)